A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

A. Hegedus, Gian Mario Maggio, Ljupco Kocarev. A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 3375-3378, IEEE, 2005. [doi]

This author has not been identified. Look up 'A. Hegedus' in GoogleThis author has not been identified. Look up 'Gian Mario Maggio' in GoogleThis author has not been identified. Look up 'Ljupco Kocarev' in Google

runs on WebDSL