A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis

A. Hegedus, Gian Mario Maggio, Ljupco Kocarev. A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 3375-3378, IEEE, 2005. [doi]

@inproceedings{HegedusMK05,
  title = {A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis},
  author = {A. Hegedus and Gian Mario Maggio and Ljupco Kocarev},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1465352},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1465352},
  tags = {analysis},
  researchr = {https://researchr.org/publication/HegedusMK05},
  cites = {0},
  citedby = {0},
  pages = {3375-3378},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}