Mitigating hardware cyber-security risks in error correcting decoders

Saied Hemati. Mitigating hardware cyber-security risks in error correcting decoders. In 9th International Symposium on Turbo Codes and Iterative Information Processing, ISTC 2016, Brest, France, September 5-9, 2016. pages 181-185, IEEE, 2016. [doi]

Abstract

Abstract is missing.