Sun ik Heo, Andrew B. Kahng, Minsoo Kim, Lutong Wang, Chutong Yang. Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019. pages 830-835, IEEE, 2019. [doi]
Abstract is missing.