Cell area minimization by transistor folding

T. W. Her, D. F. Wong. Cell area minimization by transistor folding. In Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993. pages 172-177, IEEE Computer Society, 1993. [doi]

Authors

T. W. Her

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D. F. Wong

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