T. W. Her, D. F. Wong. Cell area minimization by transistor folding. In Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993. pages 172-177, IEEE Computer Society, 1993. [doi]
@inproceedings{HerW93,
title = {Cell area minimization by transistor folding},
author = {T. W. Her and D. F. Wong},
year = {1993},
doi = {10.1109/EURDAC.1993.410633},
url = {http://dx.doi.org/10.1109/EURDAC.1993.410633},
researchr = {https://researchr.org/publication/HerW93},
cites = {0},
citedby = {0},
pages = {172-177},
booktitle = {Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993},
publisher = {IEEE Computer Society},
isbn = {0-8186-4350-1},
}