Optimizing the Timing Architecture of a Digital LSI Test System

Richard F. Herlein. Optimizing the Timing Architecture of a Digital LSI Test System. In Proceedings International Test Conference 1983, Philadelphia, PA, USA, October 1983. pages 200-211, IEEE Computer Society, 1983.

@inproceedings{Herlein83,
  title = {Optimizing the Timing Architecture of a Digital LSI Test System},
  author = {Richard F. Herlein},
  year = {1983},
  tags = {optimization, architecture, testing},
  researchr = {https://researchr.org/publication/Herlein83},
  cites = {0},
  citedby = {0},
  pages = {200-211},
  booktitle = {Proceedings International Test Conference 1983, Philadelphia, PA, USA, October 1983},
  publisher = {IEEE Computer Society},
}