A 3.5Gbit/s post-amplifier in 0.18μm CMOS

Carolien Hermans, Michiel Steyaert. A 3.5Gbit/s post-amplifier in 0.18μm CMOS. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 431-434, IEEE, 2005. [doi]

@inproceedings{HermansS05,
  title = {A 3.5Gbit/s post-amplifier in 0.18μm CMOS},
  author = {Carolien Hermans and Michiel Steyaert},
  year = {2005},
  doi = {10.1109/ESSCIR.2005.1541652},
  url = {https://doi.org/10.1109/ESSCIR.2005.1541652},
  researchr = {https://researchr.org/publication/HermansS05},
  cites = {0},
  citedby = {0},
  pages = {431-434},
  booktitle = {Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005},
  editor = {Laurent Fesquet and Andreas Kaiser and Sorin Cristoloveanu and Michel Brillouët},
  publisher = {IEEE},
  isbn = {0-7803-9205-1},
}