A global floorplanning technique for VLSI layout

Alexander Herrigel, M. Glaser, Wolfgang Fichtner. A global floorplanning technique for VLSI layout. In Computer Design: VLSI in Computers and Processors, ICCD 1989. Proceedings., 1989 IEEE International Conference on, Cambridge, MA, USA, October 2-4, 1989. pages 92-95, IEEE, 1989. [doi]

Abstract

Abstract is missing.