Addressing Defect Coverage through Generating Test Vectors for Transistor Defects

Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu. Addressing Defect Coverage through Generating Test Vectors for Transistor Defects. IEICE Transactions, 92-A(12):3128-3135, 2009. [doi]

@article{HigamiSTKT09,
  title = {Addressing Defect Coverage through Generating Test Vectors for Transistor Defects},
  author = {Yoshinobu Higami and Kewal K. Saluja and Hiroshi Takahashi and Shin-ya Kobayashi and Yuzo Takamatsu},
  year = {2009},
  url = {http://search.ieice.org/bin/summary.php?id=e92-a_12_3128},
  tags = {test coverage, testing, coverage},
  researchr = {https://researchr.org/publication/HigamiSTKT09},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {92-A},
  number = {12},
  pages = {3128-3135},
}