Matthias Hiller, Leandro Rodrigues Lima, Georg Sigl. Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs. In 17th Euromicro Conference on Digital System Design, DSD 2014, Verona, Italy, August 27-29, 2014. pages 387-393, IEEE, 2014. [doi]
Abstract is missing.