M. Hirech, O. Florent, Alain Greiner, E. Rejouan. A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. In Robert Werner, editor, EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28 - March 3, 1994, Paris, France. pages 668, IEEE Computer Society, 1994.
Abstract is missing.