A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC

Hyeok-Ki Hong, Wan Kim, Hyun-Wook Kang, Sun-Jae Park, Michael Choi, Ho-Jin Park, Seung-Tak Ryu. A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC. J. Solid-State Circuits, 50(2):543-555, 2015. [doi]

@article{HongKKPCPR15,
  title = {A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC},
  author = {Hyeok-Ki Hong and Wan Kim and Hyun-Wook Kang and Sun-Jae Park and Michael Choi and Ho-Jin Park and Seung-Tak Ryu},
  year = {2015},
  doi = {10.1109/JSSC.2014.2364833},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2364833},
  researchr = {https://researchr.org/publication/HongKKPCPR15},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {50},
  number = {2},
  pages = {543-555},
}