Tadayoshi Horita, Itsuo Takanami. Reconfiguration of 1 1/2 track-switch mesh-arrays with PE and bus faults. In 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 1996, Boston, MA, USA, November 6-8, 1996. pages 335, IEEE Computer Society, 1996. [doi]
@inproceedings{HoritaT96,
title = {Reconfiguration of 1 1/2 track-switch mesh-arrays with PE and bus faults},
author = {Tadayoshi Horita and Itsuo Takanami},
year = {1996},
doi = {10.1109/DFTVS.1996.572041},
url = {http://doi.ieeecomputersociety.org/10.1109/DFTVS.1996.572041},
researchr = {https://researchr.org/publication/HoritaT96},
cites = {0},
citedby = {0},
pages = {335},
booktitle = {1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 1996, Boston, MA, USA, November 6-8, 1996},
publisher = {IEEE Computer Society},
isbn = {0-8186-7545-4},
}