Tadayoshi Horita, Itsuo Takanami. Reconfiguration of 1 1/2 track-switch mesh-arrays with PE and bus faults. In 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 1996, Boston, MA, USA, November 6-8, 1996. pages 335, IEEE Computer Society, 1996. [doi]
Abstract is missing.