Tadayoshi Horita, Itsuo Takanami. Fault Tolerant Processor Arrays Based on 1 1/2-Track Switch with Generalized Spare Distributions. In 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN 99), 23-25 June 1999, Fremantle, Australia. pages 135-137, IEEE Computer Society, 1999. [doi]
Abstract is missing.