Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs

Kohei Hosokawa, Katsunori Tanaka, Yuichi Nakamura. Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs. IEICE Transactions, 90-A(12):2810-2817, 2007. [doi]

Abstract

Abstract is missing.