A Selective Trigger Scan Architecture for VLSI Testing - researchr publication authors

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Mohammad Hosseinabady, Shervin Sharifi, Fabrizio Lombardi, Zainalabedin Navabi. A Selective Trigger Scan Architecture for VLSI Testing. IEEE Transactions on Computers, 57(3):316-328, 2008. [doi]

This author has not been identified. Look up 'Mohammad Hosseinabady' in GoogleThis author has not been identified. Look up 'Shervin Sharifi' in GoogleThis author has not been identified. Look up 'Fabrizio Lombardi' in GoogleThis author has not been identified. Look up 'Zainalabedin Navabi' in Google

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