An FPGA-based test platform for analyzing data retention time distribution of DRAMs

Chih-Sheng Hou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu. An FPGA-based test platform for analyzing data retention time distribution of DRAMs. In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013. pages 1-4, IEEE, 2013. [doi]

Authors

Chih-Sheng Hou

This author has not been identified. Look up 'Chih-Sheng Hou' in Google

Jin-Fu Li

This author has not been identified. Look up 'Jin-Fu Li' in Google

Chih-Yen Lo

This author has not been identified. Look up 'Chih-Yen Lo' in Google

Ding-Ming Kwai

This author has not been identified. Look up 'Ding-Ming Kwai' in Google

Yung-Fa Chou

This author has not been identified. Look up 'Yung-Fa Chou' in Google

Cheng-Wen Wu

This author has not been identified. Look up 'Cheng-Wen Wu' in Google