An FPGA-based test platform for analyzing data retention time distribution of DRAMs

Chih-Sheng Hou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu. An FPGA-based test platform for analyzing data retention time distribution of DRAMs. In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{HouLLKCW13,
  title = {An FPGA-based test platform for analyzing data retention time distribution of DRAMs},
  author = {Chih-Sheng Hou and Jin-Fu Li and Chih-Yen Lo and Ding-Ming Kwai and Yung-Fa Chou and Cheng-Wen Wu},
  year = {2013},
  doi = {10.1109/VLDI-DAT.2013.6533853},
  url = {http://dx.doi.org/10.1109/VLDI-DAT.2013.6533853},
  researchr = {https://researchr.org/publication/HouLLKCW13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-4435-7},
}