Jinsong Hou, Zeyi Wang, Xianlong Hong. The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. In Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong. pages 93, IEEE, 1999. [doi]
Abstract is missing.