A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS

Steven Hsu, Amit Agarwal, Mark Anders, Himanshu Kaul, Sanu Mathew, Farhana Sheikh, Ram Krishnamurthy, Shekhar Borkar. A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 118-119, IEEE, 2012. [doi]

Authors

Steven Hsu

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Amit Agarwal

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Mark Anders

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Himanshu Kaul

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Sanu Mathew

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Farhana Sheikh

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Ram Krishnamurthy

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Shekhar Borkar

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