Steven Hsu, Amit Agarwal, Mark Anders, Himanshu Kaul, Sanu Mathew, Farhana Sheikh, Ram Krishnamurthy, Shekhar Borkar. A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 118-119, IEEE, 2012. [doi]
@inproceedings{HsuAAKMSKB12,
title = {A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS},
author = {Steven Hsu and Amit Agarwal and Mark Anders and Himanshu Kaul and Sanu Mathew and Farhana Sheikh and Ram Krishnamurthy and Shekhar Borkar},
year = {2012},
doi = {10.1109/VLSIC.2012.6243818},
url = {http://dx.doi.org/10.1109/VLSIC.2012.6243818},
researchr = {https://researchr.org/publication/HsuAAKMSKB12},
cites = {0},
citedby = {0},
pages = {118-119},
booktitle = {Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012},
publisher = {IEEE},
isbn = {978-1-4673-0848-9},
}