On circuit clustering for area/delay tradeoff under capacity and pin constraints

Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen, Hsien-Ho Chuang. On circuit clustering for area/delay tradeoff under capacity and pin constraints. IEEE Trans. VLSI Syst., 6(4):634-642, 1998. [doi]

Abstract

Abstract is missing.