A 9.6Gb/s 5+1-lane source synchronous transmitter in 65nm CMOS technology

Ke Huang, Chen Jia, Xuqiang Zheng, Ni Xu, Chun Zhang, Woogeun Rhee, Zhihua Wang. A 9.6Gb/s 5+1-lane source synchronous transmitter in 65nm CMOS technology. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 313-316, IEEE, 2012. [doi]

@inproceedings{HuangJZXZRW12,
  title = {A 9.6Gb/s 5+1-lane source synchronous transmitter in 65nm CMOS technology},
  author = {Ke Huang and Chen Jia and Xuqiang Zheng and Ni Xu and Chun Zhang and Woogeun Rhee and Zhihua Wang},
  year = {2012},
  doi = {10.1109/ISCAS.2012.6271984},
  url = {http://dx.doi.org/10.1109/ISCAS.2012.6271984},
  researchr = {https://researchr.org/publication/HuangJZXZRW12},
  cites = {0},
  citedby = {0},
  pages = {313-316},
  booktitle = {2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-0218-0},
}