Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew

Zhangcai Huang, Atsushi Kurokawa, Jun Pan, Yasuaki Inoue. Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew. IEICE Transactions, 88-A(12):3367-3374, 2005. [doi]

Abstract

Abstract is missing.