An energy-efficient resilient flip-flop circuit with built-in timing-error detection and correction

Che-Min Huang, Tsung-Te Liu, Tzi-Dar Chiueh. An energy-efficient resilient flip-flop circuit with built-in timing-error detection and correction. In VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015. pages 1-4, IEEE, 2015. [doi]

Authors

Che-Min Huang

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Tsung-Te Liu

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Tzi-Dar Chiueh

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