Che-Min Huang, Tsung-Te Liu, Tzi-Dar Chiueh. An energy-efficient resilient flip-flop circuit with built-in timing-error detection and correction. In VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015. pages 1-4, IEEE, 2015. [doi]
Abstract is missing.