Yang-Kai Huang, Kuan-Te Li, Chih-Lung Hsiao, Chia-An Lee, Jiun-Lang Huang, Terry Kuo. Design and Implementation of an EG-Pool Based FPGA Formatter with Temperature Compensation. In 26th IEEE Asian Test Symposium, ATS 2017, Taipei City, Taiwan, November 27-30, 2017. pages 88-93, IEEE Computer Society, 2017. [doi]
@inproceedings{HuangLHLHK17,
title = {Design and Implementation of an EG-Pool Based FPGA Formatter with Temperature Compensation},
author = {Yang-Kai Huang and Kuan-Te Li and Chih-Lung Hsiao and Chia-An Lee and Jiun-Lang Huang and Terry Kuo},
year = {2017},
doi = {10.1109/ATS.2017.28},
url = {http://doi.ieeecomputersociety.org/10.1109/ATS.2017.28},
researchr = {https://researchr.org/publication/HuangLHLHK17},
cites = {0},
citedby = {0},
pages = {88-93},
booktitle = {26th IEEE Asian Test Symposium, ATS 2017, Taipei City, Taiwan, November 27-30, 2017},
publisher = {IEEE Computer Society},
isbn = {978-1-5386-2437-1},
}