Low power 3-D stacking multimedia platform with reconfigurable memory architecture

Po-Han Huang, Huang-Lun Lin, Hsien-Ching Hsieh, Chi-Hung Lin, Shui-An Wen, Yi-Fa Sun. Low power 3-D stacking multimedia platform with reconfigurable memory architecture. In José Luis Ayala, Alex K. Jones, Patrick H. Madden, Ayse Kivilcim Coskun, editors, Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013. pages 311-312, ACM, 2013. [doi]

Authors

Po-Han Huang

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Huang-Lun Lin

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Hsien-Ching Hsieh

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Chi-Hung Lin

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Shui-An Wen

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Yi-Fa Sun

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