Po-Han Huang, Huang-Lun Lin, Hsien-Ching Hsieh, Chi-Hung Lin, Shui-An Wen, Yi-Fa Sun. Low power 3-D stacking multimedia platform with reconfigurable memory architecture. In José Luis Ayala, Alex K. Jones, Patrick H. Madden, Ayse Kivilcim Coskun, editors, Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013. pages 311-312, ACM, 2013. [doi]
@inproceedings{HuangLHLWS13,
title = {Low power 3-D stacking multimedia platform with reconfigurable memory architecture},
author = {Po-Han Huang and Huang-Lun Lin and Hsien-Ching Hsieh and Chi-Hung Lin and Shui-An Wen and Yi-Fa Sun},
year = {2013},
doi = {10.1145/2483028.2483117},
url = {http://doi.acm.org/10.1145/2483028.2483117},
researchr = {https://researchr.org/publication/HuangLHLWS13},
cites = {0},
citedby = {0},
pages = {311-312},
booktitle = {Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013},
editor = {José Luis Ayala and Alex K. Jones and Patrick H. Madden and Ayse Kivilcim Coskun},
publisher = {ACM},
isbn = {978-1-4503-2032-0},
}