A 64-MHz∼640-MHz 64-phase clock generator

Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng. A 64-MHz∼640-MHz 64-phase clock generator. In 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014. pages 51-54, IEEE, 2014. [doi]

Abstract

Abstract is missing.