VLSI design of dual-mode Viterbi/turbo decoder for 3GPP

Kai Huang, Fan-Min Li, Pei-Ling Shen, An-Yeu Wu. VLSI design of dual-mode Viterbi/turbo decoder for 3GPP. In ISCAS (4). pages 773-776, 2004.

Authors

Kai Huang

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Fan-Min Li

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Pei-Ling Shen

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An-Yeu Wu

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