Xu Hui, Zeng Yun. Circuit and layout combination technique to enhance multiple nodes upset tolerance in latches. IEICE Electronic Express, 12(9):20150286, 2015. [doi]
@article{HuiY15,
title = {Circuit and layout combination technique to enhance multiple nodes upset tolerance in latches},
author = {Xu Hui and Zeng Yun},
year = {2015},
url = {https://www.jstage.jst.go.jp/article/elex/12/9/12_12.20150286/_article},
researchr = {https://researchr.org/publication/HuiY15},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {12},
number = {9},
pages = {20150286},
}