Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect

H. J. Hung, J. B. Kuo, D. Chen, C.-S. Yeh. Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect. Microelectronics Reliability, 50(5):607-609, 2010. [doi]

@article{HungKCY10,
  title = {Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect},
  author = {H. J. Hung and J. B. Kuo and D. Chen and C.-S. Yeh},
  year = {2010},
  doi = {10.1016/j.microrel.2010.01.015},
  url = {http://dx.doi.org/10.1016/j.microrel.2010.01.015},
  tags = {C++},
  researchr = {https://researchr.org/publication/HungKCY10},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {50},
  number = {5},
  pages = {607-609},
}