Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs

Brad L. Hutchings, Jared Keeley. Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs. In 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014, Boston, MA, USA, May 11-13, 2014. pages 72-79, IEEE Computer Society, 2014. [doi]

@inproceedings{HutchingsK14,
  title = {Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs},
  author = {Brad L. Hutchings and Jared Keeley},
  year = {2014},
  doi = {10.1109/FCCM.2014.29},
  url = {http://dx.doi.org/10.1109/FCCM.2014.29},
  researchr = {https://researchr.org/publication/HutchingsK14},
  cites = {0},
  citedby = {0},
  pages = {72-79},
  booktitle = {22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014, Boston, MA, USA, May 11-13, 2014},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4799-5110-9},
}