Chanseok Hwang, Chang Woo Kang, Massoud Pedram. Gate Sizing and Replication to Minimize the Effects of Virtual Ground Parasitic Resistances in MTCMOS Designs. In 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA. pages 741-746, IEEE Computer Society, 2006. [doi]
Abstract is missing.