Abstract is missing.
- Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary TranslatoYoufeng Wu, Mauricio Breternitz Jr., Tevi Devor. 3-12 [doi]
- Exploitation of Instruction-Level Parallelism for Optimal Loop SchedulingJan Müller, Dirk Fimmel, Renate Merker. 13-21 [doi]
- Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded SystemsJosé Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado, Katzalin Olcoz, Jose Manuel Mendias. 25-32 [doi]
- Dynamic Management of Nursery Space Organization in Generational CollectionJosé Manuel Velasco, Antonio Ortiz, Katzalin Olcoz, Francisco Tirado. 33-40 [doi]
- Cool-Fetch: A Compiler-Enabled IPC Estimation Based Framework for Energy ReductionOsman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz. 43-52 [doi]
- Energy-Efficiency Potential of a Phase-Based Cache Resizing Scheme for Embedded SystemsGilles Pokam, François Bodin. 53-62 [doi]
- SimSnap: Fast-Forwarding via Native Execution and Application-Level CheckpointingPeter K. Szwed, Daniel Marques, Robert M. Buels, Sally A. McKee, Martin Schulz. 65-74 [doi]
- Exploiting Procedure Level Locality to Reduce Instruction Cache MissesRavi V. Batchu, Daniel A. Jiménez. 75-84 [doi]
- Link-Time Optimization Techniques for Eliminating Conditional Branch RedundanciesManel Fernández, Roger Espasa. 87-96 [doi]
- Reducing Fetch Architecture Complexity Using Procedure InliningOliverio J. Santana, Alex Ramírez, Mateo Valero. 97-106 [doi]
- Fast Indexing for Blocked Array Layouts to Improve Multi-Level Cache LocalityEvangelia Athanasaki, Nectarios Koziris. 109-119 [doi]
- Data Movement Optimization for Software-Controlled On-Chip MemoryMotonobu Fujita, Masaaki Kondo, Hiroshi Nakamura. 120-127 [doi]