The P4->NetFPGA Workflow for Line-Rate Packet Processing

Stephen Ibanez, Gordon J. Brebner, Nick McKeown, Noa Zilberman. The P4->NetFPGA Workflow for Line-Rate Packet Processing. In Kia Bazargan, Stephen Neuendorffer, editors, Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019. pages 1-9, ACM, 2019. [doi]

Abstract

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