Tamper Resistivity Analysis for Nano-meter LSI with Process Variations - researchr publication authors

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Makoto Ikeda, Hiroshi Yamauchi, Kunihiro Asada. Tamper Resistivity Analysis for Nano-meter LSI with Process Variations. In 13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006. pages 387-390, IEEE, 2006. [doi]

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