Makoto Ikeda, Hiroshi Yamauchi, Kunihiro Asada. Tamper Resistivity Analysis for Nano-meter LSI with Process Variations. In 13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006. pages 387-390, IEEE, 2006. [doi]
@inproceedings{IkedaYA06,
title = {Tamper Resistivity Analysis for Nano-meter LSI with Process Variations},
author = {Makoto Ikeda and Hiroshi Yamauchi and Kunihiro Asada},
year = {2006},
doi = {10.1109/ICECS.2006.379806},
url = {http://dx.doi.org/10.1109/ICECS.2006.379806},
researchr = {https://researchr.org/publication/IkedaYA06},
cites = {0},
citedby = {0},
pages = {387-390},
booktitle = {13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006},
publisher = {IEEE},
isbn = {1-4244-0395-2},
}