A new HW/SW partitioning algorithm for synthesizing the highest performance pipelined ASIPs with multiple identical FUs - researchr publication authors

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Masaharu Imai, Nguyen-Ngoc Bình, Akichika Shiomi. A new HW/SW partitioning algorithm for synthesizing the highest performance pipelined ASIPs with multiple identical FUs. In Graham Symonds, Wolfgang Nebel, editors, Proceedings of the conference on European design automation, EURO-DAC '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996. pages 126-131, IEEE Computer Society Press, 1996. [doi]

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