Masaharu Imai, Nguyen-Ngoc Bình, Akichika Shiomi. A new HW/SW partitioning algorithm for synthesizing the highest performance pipelined ASIPs with multiple identical FUs. In Graham Symonds, Wolfgang Nebel, editors, Proceedings of the conference on European design automation, EURO-DAC '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996. pages 126-131, IEEE Computer Society Press, 1996. [doi]
@inproceedings{ImaiBS96,
title = {A new HW/SW partitioning algorithm for synthesizing the highest performance pipelined ASIPs with multiple identical FUs},
author = {Masaharu Imai and Nguyen-Ngoc Bình and Akichika Shiomi},
year = {1996},
url = {http://dl.acm.org/citation.cfm?id=252499},
researchr = {https://researchr.org/publication/ImaiBS96},
cites = {0},
citedby = {0},
pages = {126-131},
booktitle = {Proceedings of the conference on European design automation, EURO-DAC '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996},
editor = {Graham Symonds and Wolfgang Nebel},
publisher = {IEEE Computer Society Press},
isbn = {0-8186-7573-X},
}