Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials

José Luis Imaña. Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials. In 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018. pages 222, IEEE Computer Society, 2018. [doi]

Authors

José Luis Imaña

This author has not been identified. Look up 'José Luis Imaña' in Google