Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials

José Luis Imaña. Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials. In 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018. pages 222, IEEE Computer Society, 2018. [doi]

@inproceedings{Imana18-1,
  title = {Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials},
  author = {José Luis Imaña},
  year = {2018},
  doi = {10.1109/FCCM.2018.00056},
  url = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2018.00056},
  researchr = {https://researchr.org/publication/Imana18-1},
  cites = {0},
  citedby = {0},
  pages = {222},
  booktitle = {26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-5522-1},
}