Preventing timing errors on register writes: mechanisms of detections and recoveries

Hidetsugu Irie, Ken Sugimoto, Masahiro Goshima, Shuichi Sakai. Preventing timing errors on register writes: mechanisms of detections and recoveries. SIGARCH Computer Architecture News, 35(5):25-31, 2007. [doi]

@article{IrieSGS07,
  title = {Preventing timing errors on register writes: mechanisms of detections and recoveries},
  author = {Hidetsugu Irie and Ken Sugimoto and Masahiro Goshima and Shuichi Sakai},
  year = {2007},
  doi = {10.1145/1360464.1360473},
  url = {http://doi.acm.org/10.1145/1360464.1360473},
  researchr = {https://researchr.org/publication/IrieSGS07},
  cites = {0},
  citedby = {0},
  journal = {SIGARCH Computer Architecture News},
  volume = {35},
  number = {5},
  pages = {25-31},
}