Kazuhisa Ishizaka, T. Miyamoto, S. Akimoto, A. Iketani, T. Hosomi, Junji Sakai. Power efficient realtime super resolution by virtual pipeline technique on a server with manycore coprocessors. In 2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013. pages 1-3, IEEE, 2013. [doi]
@inproceedings{IshizakaMAIHS13,
title = {Power efficient realtime super resolution by virtual pipeline technique on a server with manycore coprocessors},
author = {Kazuhisa Ishizaka and T. Miyamoto and S. Akimoto and A. Iketani and T. Hosomi and Junji Sakai},
year = {2013},
doi = {10.1109/CoolChips.2013.6547918},
url = {http://dx.doi.org/10.1109/CoolChips.2013.6547918},
researchr = {https://researchr.org/publication/IshizakaMAIHS13},
cites = {0},
citedby = {0},
pages = {1-3},
booktitle = {2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013},
publisher = {IEEE},
isbn = {978-1-4673-5780-7},
}