Kazuhisa Ishizaka, T. Miyamoto, S. Akimoto, A. Iketani, T. Hosomi, Junji Sakai. Power efficient realtime super resolution by virtual pipeline technique on a server with manycore coprocessors. In 2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013. pages 1-3, IEEE, 2013. [doi]
Abstract is missing.