Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug

Yousef Iskander, Cameron D. Patterson, Stephen D. Craven. Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug. In International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece. pages 518-523, IEEE, 2011. [doi]

Abstract

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