Tsuyoshi Isshiki, Akihisa Ohta, T. Watanabe, T. Nakada, K. Akahane, I. Sisla, Dongju Li, Hiroaki Kunieda. High density bit-serial FPGA with LUT embedding shift register function. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 475-480, IEEE, 2002. [doi]
@inproceedings{IsshikiOWNASLK02,
title = {High density bit-serial FPGA with LUT embedding shift register function},
author = {Tsuyoshi Isshiki and Akihisa Ohta and T. Watanabe and T. Nakada and K. Akahane and I. Sisla and Dongju Li and Hiroaki Kunieda},
year = {2002},
doi = {10.1109/APCCAS.2002.1115034},
url = {http://dx.doi.org/10.1109/APCCAS.2002.1115034},
researchr = {https://researchr.org/publication/IsshikiOWNASLK02},
cites = {0},
citedby = {0},
pages = {475-480},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002},
publisher = {IEEE},
}